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Processor PM Development Kit
原廠/品牌: Lattice 上架日期: 04/13
供應商: Lattice 產品類別: FPGA

     Get started integrating multiple power management

      ICs fast with the ProcessorPM Development Kit. The kit is a versatile, ready to use hardware platform for evaluating and designing with ProcessorPM power management devices. The kit is based on a 2.5” x 2” evaluation board that features the ProcessorPM - POWR605 device in a lead-free 24-pin QFN package, a Power Manager II - POWR6AT6, evaluation circuits that emulate a power supply bus and processor interface, and an expansion header.

     To help you get started quickly, the kit includes a pre-configured processor support demonstration design that will support hundreds of microprocessor, DSP, ASSP, or ASIC power management scenarios. The demo integrates three key support functions for a processor: voltage supervisor, watchdog timer (WDT), and reset generator. The board is controlled with switches and pushbuttons. And a slide potentiometer emulates brown-out conditions on a 2.5V supply rail. A pin header provides access to IOs of the ProcessorPM and the POWR6AT6. You may extend or modify the pre-configured demo using PAC-Designer® software.

     The board can be modified to support programming with Lattice ISP Download Cables with a parallel PC connection and demonstrate power supply margin/trim scenarios with the POWR6AT6.


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